Class RegionOp

Defined in File DFGOps.h.inc

Inheritance Relationships

Base Type

public mlir::Op< RegionOp, ::mlir::OpTrait::OneRegion, ::mlir::OpTrait::ZeroResults, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::ZeroOperands, ::mlir::OpTrait::NoTerminator, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::dfg::NodeInterface::Trait, ::mlir::dfg::GraphInterface::Trait, ::mlir::OpTrait::IsIsolatedFromAbove, ::mlir::OpAsmOpInterface::Trait >

Class Documentation

class RegionOp : public mlir::Op<RegionOp, ::mlir::OpTrait::OneRegion, ::mlir::OpTrait::ZeroResults, ::mlir::OpTrait::ZeroSuccessors, ::mlir::OpTrait::ZeroOperands, ::mlir::OpTrait::NoTerminator, ::mlir::OpTrait::OpInvariants, ::mlir::BytecodeOpInterface::Trait, ::mlir::dfg::NodeInterface::Trait, ::mlir::dfg::GraphInterface::Trait, ::mlir::OpTrait::IsIsolatedFromAbove, ::mlir::OpAsmOpInterface::Trait>

Public Types

using Adaptor = RegionOpAdaptor 

template<typename RangeT> using GenericAdaptor = RegionOpGenericAdaptor<RangeT>

using FoldAdaptor = GenericAdaptor<::llvm::ArrayRef<::mlir::Attribute>>

using Properties = FoldAdaptor::Properties

Public Functions

inline ::llvm::ArrayRef<::llvm::StringRef> getAttributeNames()

inline ::mlir::StringAttr getFunctionTypeAttrName()

inline ::mlir::StringAttr getSymNameAttrName()

inline std::pair<unsigned, unsigned> getODSOperandIndexAndLength(unsigned index)

inline ::mlir::Operation::operand_range getODSOperands(unsigned index)

inline std::pair<unsigned, unsigned> getODSResultIndexAndLength(unsigned index)

inline ::mlir::Operation::result_range getODSResults(unsigned index)

inline ::mlir::Region &getBody()

void writeProperties(::mlir::DialectBytecodeWriter &writer)

inline ::mlir::StringAttr getSymNameAttr()

::llvm::StringRef getSymName()

inline ::mlir::TypeAttr getFunctionTypeAttr()

::mlir::FunctionType getFunctionType()

inline void setSymNameAttr(::mlir::StringAttr attr)

void setSymName(::llvm::StringRef attrValue)

inline void setFunctionTypeAttr(::mlir::TypeAttr attr)

void setFunctionType(::mlir::FunctionType attrValue)

void print(::mlir::OpAsmPrinter &p)

Prints a dfg::RegionOp in the custom assembly syntax consumed by parse.

The symbol name is printed first, followed by optional inputs(...) and outputs(...) clauses where port names are sourced from the body’s block arguments. The sym_name and function_type attributes are always elided. Unlike ProcessOp, the body region is unconditionally emitted because RegionOp has no external-declaration form.

::llvm::LogicalResult verifyInvariantsImpl()

::llvm::LogicalResult verifyInvariants()

::llvm::LogicalResult verify()

Verifies that a dfg::RegionOp is structurally well-formed.

All input ports should be of type dfg::OutputType and output ports of type dfg::InputType.

The body is expected to contain only ChannelOp, InstantiateOp, and EmbedOp; any other operation triggers a warning (not an error) to allow experimental extensions without hard breakage.

Additionally, each body block argument — representing a port on the region boundary — is checked for connectivity: a port with no uses is reported as dangling, and a port used more than once is reported as multiply connected. Both conditions are emitted as warnings rather than errors because they may be intentional during incremental IR construction.

void getAsmBlockArgumentNames(::mlir::Region &region, ::mlir::OpAsmSetValueNameFn setNameFn)

Names the block arguments of the RegionOp body.

Input port arguments are named in0, in1, … and output port arguments out0, out1, … in declaration order. Both groups are present as block arguments because RegionOp acts as a structural sub-graph container: channels inside the body connect to both sides of the port boundary.

inline std::string getNodeName()

inline unsigned getNumInputPorts()

inline Value getInputPort(unsigned index)

inline SmallVector<Type> getInputPortTypes(): Returns a vector of base types of the input ports.

inline SmallVector<Value> getInputPorts()

inline unsigned getNumOutputPorts()

inline Value getOutputPort(unsigned index)

inline SmallVector<Type> getOutputPortTypes(): Returns a vector of base types of the output ports.

inline SmallVector<Value> getOutputPorts()

inline std::string getGraphName()

inline bool isSubGraph()

inline SmallVector<Operation*> getGraphNodes()

inline SmallVector<Operation*> getGraphSubGs()

inline SmallVector<Operation*> getGraphEdges()

Public Static Functions

static inline ::mlir::StringAttr getFunctionTypeAttrName(::mlir::OperationName name)

static inline ::mlir::StringAttr getSymNameAttrName(::mlir::OperationName name)

static inline constexpr ::llvm::StringLiteral getOperationName()

static ::llvm::LogicalResult setPropertiesFromAttr(Properties &prop, ::mlir::Attribute attr, ::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError)

static ::mlir::Attribute getPropertiesAsAttr(::mlir::MLIRContext *ctx, const Properties &prop)

static llvm::hash_code computePropertiesHash(const Properties &prop)

static std::optional<mlir::Attribute> getInherentAttr(::mlir::MLIRContext *ctx, const Properties &prop, llvm::StringRef name)

static void setInherentAttr(Properties &prop, llvm::StringRef name, mlir::Attribute value)

static void populateInherentAttrs(::mlir::MLIRContext *ctx, const Properties &prop, ::mlir::NamedAttrList &attrs)

static ::llvm::LogicalResult verifyInherentAttrs(::mlir::OperationName opName, ::mlir::NamedAttrList &attrs, llvm::function_ref<::mlir::InFlightDiagnostic()> emitError)

static ::llvm::LogicalResult readProperties(::mlir::DialectBytecodeReader &reader, ::mlir::OperationState &state)

static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, StringRef name, FunctionType functionType, function_ref<void(OpBuilder&, Location, ValueRange)> bodyBuilder = nullptr)

Builds a RegionOp with the given name, port types, and body.

Input and output types in functionType are wrapped in the corresponding DFG channel types if not already present, following the same convention as ProcessOp::build:

function inputs → dfg::OutputType
function results → dfg::InputType

Both wrapped input and output types are added as block arguments so that channel declarations inside the body can connect to either side of the port boundary.

Parameters:

name – Symbol name of the region (must be unique in the module).
functionType – Port signature before DFG-type wrapping.
bodyBuilder – Callback invoked with the builder at the entry block; may be null.

static RegionOp create(::mlir::OpBuilder &builder, ::mlir::Location location, StringRef name, FunctionType functionType, function_ref<void(OpBuilder&, Location, ValueRange)> bodyBuilder = nullptr)

static RegionOp create(::mlir::ImplicitLocOpBuilder &builder, StringRef name, FunctionType functionType, function_ref<void(OpBuilder&, Location, ValueRange)> bodyBuilder = nullptr)

static ::mlir::ParseResult parse(::mlir::OpAsmParser &parser, ::mlir::OperationState &result)

Parses a dfg::RegionOp from its custom assembly syntax.

The expected syntax is:

`dfg.region` @name
  (`inputs` `(` arg-list `)`)?
  (`outputs` `(` arg-list `)`)?
  (`attributes` attr-dict)?
  region

The structure is the same as ProcessOp::parse — both argument lists are merged and forwarded as block arguments — but a RegionOp is always concrete: the body region is mandatory. External RegionOp declarations are not supported.

static void getCanonicalizationPatterns(::mlir::RewritePatternSet &results, ::mlir::MLIRContext *context)

Canonicalization patterns for dfg::RegionOp.

ReorderContentOperations: Rebuilds the region body so that all ChannelOp declarations appear before any InstantiateOp or EmbedOp. This canonical ordering simplifies analyses that expect channel SSA values to be defined before the nodes that consume them. An internal visited-set prevents re-rewriting an already reordered region.

static ::llvm::LogicalResult setPropertiesFromParsedAttr(Properties &prop, ::mlir::Attribute attr, ::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError)